1. Field of the Invention
The present invention relates to an apparatus for pulling single crystal by Czochralski (CZ) method (a Czochralski (CZ) single crystal puller) equipped with a cooler for cooling a pulled single crystal.
Further, the present invention relates to a CZ single crystal puller which is equipped with a cooler for cooling a pulled single crystal and which can smoothly eliminate dislocations from a silicon seed crystal by means of the Dash's neck method.
The present invention also relates to a CZ single crystal puller which is equipped with a cooler for cooling a pulled single crystal and which can smoothly perform recharging and additional charging operations.
The present invention further relates to a CZ single crystal puller which is equipped with a cooler for cooling a pulled single crystal and a safety mechanism for avoiding hazard, which would result from installation of the cooler.
The present invention further relates to a technique for optimizing requirements for manufacturing a silicon wafer to be produced by the Czochralski (CZ) method.
2. Related Art
As a CZ single crystal puller which pulls a single crystal by means of the Czochralski (CZ) method, a CZ single crystal puller equipped with a cooler to be disposed in a CZ furnace (herein after often called a “furnace cooler”) for cooling a pulled single crystal has recently been employed. Use of such a CZ single crystal puller equipped with a furnace cooler enables a considerable increase in a single-crystal pull rate. Consequently, efficiency in production of a single crystal ingot or wafer can be increased. Hence, the CZ single crystal puller equipped with a furnace cooler is of great significance.
Studies conducted by the present inventors showed that presence of a cooler poses difficulty in eliminating dislocations from a silicon seed crystal when an attempt is made to eliminate dislocations (primarily dislocations induced by thermal shock when a seed crystal is immersed in a melt) from a silicon seed crystal through use of the Dash's neck method (W. Dash: Journal of Applied Physics 30 (1959) pg. 459).
The present invention has been conceived in light of the foregoing drawbacks, and a first object of the present invention is to provide a CZ single crystal puller which is equipped with a cooler to be disposed in a CZ furnace and which can smoothly eliminate dislocations from a silicon seed crystal by means of the Dash's neck method.
In addition to the furnace cooler, a thermal insulation shield or a like member for shielding heat radiating from a heater or a melt is often disposed within the CZ furnace in order to optimize requirements for pulling a single crystal.
At the time of pulling of a single crystal through use of the CZ method, material is additionally charged or recharged in order to produce a single crystal of maximum size during a single process.
However, members to be disposed within a furnace (hereinafter often called “furnace members”); particularly, the cooler and the thermal insulation shield, hinder additional charge or recharge of material. Great attention must be paid to a problem of melt splashes; particularly, during additional charge or recharge of material, rather than during initial charge of material. When a cooler is disposed near a crucible, heating must be effected so as to overcome the cooling effect of the cooler at the time of charge of material. Hence, the amount of energy dissipation is increased.
The present invention has been conceived in view of the above-described drawbacks, and a second object of the present invention is to provide a CZ single crystal puller which is equipped with a cooler and a thermal-insulation shield, both being provided in a CZ furnace, and which can smoothly perform additional charge or recharge of material.
In connection with a CZ single crystal puller which pulls a single crystal by means of the Czochralski (CZ) method, there have already been put forward various types of coolers to be disposed in a CZ furnace of the CZ single crystal puller. One of the proposed coolers moves within the CZ furnace (as described in Japanese Patent Application Laid-Open No. 92272/1999). There is room for improving such a furnace cooler.
The present invention has been conceived in view of the drawback set forth, and a third object of the present invention is to provide a CZ single crystal puller having a cooler which is to be disposed in a CZ furnace and has improved functionality.
A fourth object of the present invention is to provide a CZ single crystal puller which has a cooler moving within a CZ furnace and a safety mechanism, wherein the cooler located within the CZ furnace immediately avoids hazards by means of appropriately detecting potential collision with other furnace members.
In connection with a silicon wafer produced by means of the CZ method for use in manufacturing semiconductor devices, crystalline imperfections which deteriorate the quality of a device are present in the surface layer of a silicon wafer that is simply sliced off from a silicon ingot. As the silicon wafer is subjected to intense heat treatment (i.e., annealing), voids existing in the surface layer of a wafer disappear. For example, it has been known that voids—which are detected as, for example, LSTDs, FPDs, or COPs, and exist in the surface layer of a CZ silicon wafer having been subjected to hydrogen heat treatment (hydrogen annealing)—disappear and as a result the wafer exhibits a superior oxide film withstand-pressure characteristic (as described in Japanese Patent Publication No. 80338/1991).
However, the effect of hydrogen annealing is limited to solely the area in the vicinity of the uppermost surface of a silicon wafer. In this regard, the present inventors found that the rate at or depth to which defects located in the vicinity of the surface layer of a wafer are eliminated by means of high-temperature annealing substantially depends on the sizes of initial defects. The present inventors have proposed a method of expanding a defect-free area from the surface layer of a wafer to a comparatively deep position in the wafer, by means of increasing a cooling rate of crystal being grown within a temperature zone in which defects are apt to arise (as described in Japanese Patent Application Laid-Open No. 208987/1998), controlling a V/G (V denotes a pull rate, and G denotes a temperature gradient along the crystallographic axis and in the vicinity of a melting point), or controlling the diameter of an OSF ring (as described in Japanese Patent Application Laid-Open No. 154095/2000), thus miniaturizing size of defects in a crystal.
So long as a rate at which a crystal is to be pulled (hereinafter called simply a “crystal pull rate”) is increased, the method enables miniaturization of defects of a growing crystal to a size at which the defects are apt to disappear by means of annealing. Further, if the pull rate is increased, the volume of silicon ingot produced per unit time is eventually increased, thus improving the production efficiency of a wafer.
If a crystal can be pulled faster than what has been expected thus far, the production efficiency of wafers of all types can be improved to a much greater extent, regardless of whether the wafer is to be used for epitaxial growth or annealing purpose.
In a case where a crystal pull rate is increased, if miniaturization of crystalline imperfections becomes possible at least without a crystal being adversely affected by an increase in pull rate, crystalline imperfections can be miniaturized at a high pull rate. Particularly, if an increase in pull rate and miniaturization of crystalline imperfections can be attained simultaneously, immediate production of a wafer for annealing purpose (i.e., from which crystalline imperfections are likely to disappear and which is suitable for undergoing annealing) can be attained.
The present invention has been conceived in view of the drawbacks of the related art set forth, and a fifth object of the present invention is to improve production efficiency of wafers of all types, regardless of whether or not the wafers are to be used for epitaxial growth or annealing purpose, by means of increasing the crystal pull rate.
A sixth object of the present invention is to simultaneous realization of miniaturization of crystalline imperfections to a size smaller than has been expected thus far and an increased pull rate, thereby improving the production efficiency of a wafer for annealing purpose.